DSP Software Engineering

NAS developes and optimises code at the instruction level to take advantage of SIMD vector operations. This can be done in both C code and hand tweaked assembler when required. The machine instruction sets that NAS has experience of are:

  • Altivec and PowerPC instruction sets.
  • Intel SSE4 instruction set.
  • Intel AVX instruction set.
  • Intel AVX2 instruction set.
  • Intel AVX512 instruction set.
  • Intel MIC instruction set.
  • MIPS and paired single vector instruction sets.
  • ARMv8 instruction sets.

As the number of cores in modern computer systems increases each year the techniques in parallising code over computer boards and cores becomes more and more important. NAS routinely designs and developes code over multicore and multiprocessor computer systems to take advantage of the following parallelism:  


  • SIMD vector parallelism.
  • SMP parallelism.
  • MIMD parallelism.
 
 









NAS has many years of experience in writing high-performance computationally expensive maths algorithms and the numerical techniques that optimise the performance of the codes. We use these techniques in our COTS products and our customer's custom-made library functionality.